VideoBrain Video Hardware U.S. Patent 4177462 Overview By Kurt Woloch May 11, 2012 Preface By Adam Trionfo --------------- The VideoBrain's U.S. patent #4,177,462, "Computer Control of Television Receiver Display," is a 27-page technical document. The obscure abstract of the patent begins thus: A method and apparatus for generating, under the control of a microprocessor, signals for operating a visual display mechanism of the scanning type. The position of the scan is tracked, and when it approaches a desired location on the display area for a particular segment to be displayed, it responds thereto by directing delivery to the scanning system of control signals which define the selected. display segment. A plurality of display segments, each containing information at least partially defining one or more object images which it may be desired to be included in a specified display, are stored in a cartridge memory which can also include specific operating instructions for carrying out a particular game or other function with such display segments. Each of the display composers includes an associative memory arrangement for addressing the cartridge memory and directing feedout therefrom of specified segments at times required during the scan. A FIFO buffer is also included in each of the display composers for delivering information defining an object image at a regular rate correlated to the scanning rate, irrespective of the time in which such information is made ready for the display. If you're like me, than the abstract for the patent makes little sense to you. Kurt Woloch wrote a handy overview of the entire patent written in understandable language. Kurt, a member of the Channel F and VideoBrain Yahoo discussion group, shared his concise thoughts with the group. His original message, titled "Re: A Second VideoBrain Patent (With Pinball Source Code)" (Message #260), reads as follows: Overview U.S. Patent 4177462 ---------------------------- By Kurt Woloch May 5, 2012 This is an interesting patent, but I've noticed that it's a bit older than the one previously found [U.S. patent #4,232,374]. Basically, it describes roughly the same system, but the version of the video hardware described in this earlier patent has got three additional registers which apparently have been deleted in a subsequent revision. These registers are: Zoom register ($08F6)... would have contained multipliers from 1 to 15 for the X and Y direction describing by which factor the segments get magnified horizontally and vertically. Like the existing X-ZM and Y-ZM bits, these would have been global for all segments. Y-offset and X-offset registers ($08F4 and $08F3)... these would have changed the distance from the screen edge to the start of the display, similar to the scroll registers on the C-64 or VIC-20. Apart from that, some registers have different names, and the Control Register has two different bits. Bit 0 is undefined (which later became the X-Zoom bit), and Bit 4 is called "Int.Sel.", which is there to select where the interrupt comes from. I excepted this to be where you can select if there's a light pen or a scanline interrupt, but in fact it says it switches between a scanline interrupt and an interrupt at the start of the vertical blanking interval. This actually is the bit I've denoted as "missing" in my technical video detail post because the "Int.Sel." bit does get mentioned in the other patent, but it isn't there in any register. Here it is... in Bit 4. According to this patent, however, the interrupt works as follows: - You can enable or disable generating interrupts altogether by setting Bit 3 (Int.) to 1 or 0. Setting it to 1 enables interrupts. - If the Int. bit 1 is set to 1, the Int.Sel. bit (bit 4) selects what generates the interrupt. If Int.Sel. is set to 1, there's a line interrupt triggered by reaching the scanline given by the Y-interrupt register at $08F0 together with bit 7 of $08F7 as the most significant bit. If Int.Sel is set to 0, the interrupt occurs at the start of the vertical blanking interval instead. - Alternatively, you can set the FRZ bit to 1, which turns the interrupt line into an input line. Thus, no interrupts get generated for the CPU, but a signal on the interrupt line (by a light pen) triggers the current row and column to be copied into the freeze registers. I don't know, however, how this works in the final production version of the video hardware since it seems that the Int.Sel. bit has been turned into something else (the KBD bit) although it's still mentioned in the later patent. My guess would be that the Int.Sel. bit has been deleted because you can always set the scanline interrupt to occur at the start of vertical blanking by setting it to the scanline where the vertical blanking starts. The "Pinball" source code is interesting as well, mainly since it's much heavier on comments than the "Tennis" listing. The VideoBrain video patent can be read here: http://www.orphanedgames.com/videobrain/patents/Videobrain_Patent_4177462/ Videobrain%20Video%20Hardware%20Patent%20%28US%204177462%29.pdf For those interested, the Channel F and VideoBrain group can be visited here: http://tech.groups.yahoo.com/group/channel_f_and_videobrain Visit the group say hello; you're sure to learn something about the incredibly obscure VideoBrain computer system.